Memory Testing with TestMem5 TM5 with custom configs (2022)

Why is this program needed.

Well, I think you know what the program is about, after all, version 5. At the moment, the memory tests are not bad, but quite bad. I would not like to talk about 'all' tests, but most of them are unaware of significant changes in the hardware. And the main 'harm' is not at all from memory, it has evolved little, namely, from the processor and memory controller (to a lesser extent). Processors have become faster, there are a lot of them and they have become strange. Memory Testing with TestMem5 TM5 with custom configs (1) For example, before the memory 'sat' on one controller, with which the processor communicated. Now memory can hang on different processors and, as a result, have a different 'distance' from a particular processor core to a particular DIMM. In addition, the amount of caches in the processor has increased, which may affect testing. For example, TM4 used 512K test block size. At the time of writing the program, this was the optimum, but now this block quietly fits in L2 and the test does not work at all as intended. Will this unpleasant moment affect the quality of memory failure detection? Undoubtedly and in the most disgusting way. Alas. Other programs can operate on an access block, which is now extremely unreasonable and causes more problems than mythical benefits. Everything becomes obsolete. Alas, the same fate befell MemTest86. Quite good and effective, now it has quietly degraded to 'just a test'. The reason is the same - the test modules have not changed for a long time, and the hardware does not stand still. Alas. Other programs can operate on an access block, which is now extremely unreasonable and causes more problems than mythical benefits. Everything becomes obsolete. Alas, the same fate befell MemTest86. Quite good and effective, now it has quietly degraded to 'just a test'. The reason is the same - the test modules have not changed for a long time, and the hardware does not stand still. Alas. Other programs can operate on an access block, which is now extremely unreasonable and causes more problems than mythical benefits. Everything becomes obsolete. Alas, the same fate befell MemTest86. Quite good and effective, now it has quietly degraded to 'just a test'. The reason is the same - the test modules have not changed for a long time, and the hardware does not stand still.
However, if you read a horror story about testing problems, please Memory Testing with TestMem5 TM5 with custom configs (2)

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What's new.

Added full support for 16 tests and the ability to load other test configuration files. Unfortunately, a complete and imperceptible restart of the program is very difficult, so you will have to use the "manual" launch. After installing the new settings file, the program closes.

Appearance.

Memory Testing with TestMem5 TM5 with custom configs (3)
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In the program window, on the left, the type and name of the processor, its frequency, the number of cores and the supported SSE modes are displayed.
The right side shows the state of the system memory - how much is available and how much the program is busy with.
The middle left shows the progress of testing, when a failure is detected, cells 0-5 change color to red and the number of test failures is displayed in the status section in the middle right.
Small description.

This program is built on a slightly different principle than all the previous ones. Namely - it is customizable... Moreover, it can be configured by the user for those conditions that seem best to him. The program has the concept of 'test module' and 'test'. A module is called to perform testing, but it can (and should) be configured in different ways. Formally speaking, tests in S&M are one and the same module, but with different settings - have you seen that the performance of tests varies significantly? ... and this effect can be different for different memory (different manufacturers). Well, if the efficiency changes, then the logical conclusion from this is that by adjusting the parameters it is possible to raise it (efficiency, that is). It is difficult to consider a program that was written 5 years ago to be optimal. Memory Testing with TestMem5 TM5 with custom configs (4) So, test = test module + individual settings. The second point is the number of test threads. In terms of modern processors, the number of testing threads should be more than one, which will make it easier (more precisely, more often) to communicate with processors with their own memory. This is especially true for the K10-11-12 with its distributed bus. The program supports a different (let's put it mildly) number of testing threads. From S&M's experience, I can say - the fastest mode for one process, but I have been repeatedly informed that enabling multiple mode, although it leads to a slight decrease in speed, increases the efficiency of the algorithm. Well ... although the speed of work is almost synonymous with quality (because a slow algorithm will not find errors), it is stupid to argue with practice. The program supports a different (let's put it mildly) number of testing threads. From S&M's experience, I can say - the fastest mode for one process, but I have been repeatedly informed that enabling multiple mode, although it leads to a slight decrease in speed, increases the efficiency of the algorithm. Well ... although the speed of work is almost synonymous with quality (because a slow algorithm will not find errors), it is stupid to argue with practice. The program supports a different (let's put it mildly) number of testing threads. From S&M's experience, I can say - the fastest mode for one process, but I have been repeatedly informed that enabling multiple mode, although it leads to a slight decrease in speed, increases the efficiency of the algorithm. Well ... although the speed of work is almost synonymous with quality (because a slow algorithm will not find errors), it is stupid to argue with practice.
At the moment, the following test parameters are planned (and supported):

  • block size. The smaller, the more efficient the algorithm. But, if the block fits into the cache, then the algorithm will fail.
  • block bypass method. Linear or bouncing. The first one has a high speed, the second one - more intensively loads the controller-DIMM bundle and leads to greater memory heating. (um, it's not for nothing that the fourth test in S&M heated up the memory so much).
  • the principle of generating templates. Constant, variable and random.

Test modules.
So far there are only two of them, but this is temporary.
1. Test 0, namely, and only on it this module works - data stability check. The idea here is that all memory is signed with some non-constant pattern, then testing is performed and the safety of this data is checked.
The test dramatically slows down the testing speed.
2. SimpleTest - although it is called simple, it is more sarcasm. All settings are supported (size-method-template), but not very efficiently optimized due to increased versatility. However, losses due to non-optimal software implementation are not so great and are leveled when multi-threaded testing is enabled - several processors clog the memory I / O channel by 100%. Memory Testing with TestMem5 TM5 with custom configs (5) However, if something can be simplified, the speed will increase.
Feature: the program consists of two parts - a startup program and a DLL with test modules. Unpack everything and keep the directories.

Wrote two functions: MirrorMove and MirrorMove128.
The bottom line is that the test block is turned inside out. In this case, two processes of reading and writing go to meet. If the memory controller is trying to be clever and adapt to the access mode, then from such pornography its boss should be demolished - there are never two equal processes in + and in - addressing. The functions themselves only shake the block, but do not test data integrity. Test 0 is used for verification. Therefore, if you want to use these functions, do not turn off test 0.

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MirrorMove
- mirrors the testing block. With an even number of reflections, the final state of the block does not change (if there are no failures). The block itself can be split into several subblocks and 'mirrored' simultaneously [/ i]. This creates big problems for the controller (and the memory itself) - more often you have to overload SDRAM pages.
Only Test Block Size and Parameter are configurable, which can take values 1,2,3,4 - this is the number of sub-blocks in the block.
All other settings (and this is the template generation mode) are ignored.

MirrorMove128
- similar to MirrorMove, but works a little differently - operations are performed on a page of 128 bytes (see below), an additional offset is made between access. Those. movement (mirroring) is done in stripes in several passes - first even stripes, then odd (for 2 stripes). In addition to increasing the load on the memory controller, this action causes an intensive page reload in SDRAM, which increases the likelihood of a failure in it. (well, heating, of course)
Only Test Block Size and Parameter are adjustable, which can take values from 0 and more. The Parameter itself means how much additional [/ i] should be shifted in pages of 128 bytes. Those. 0 will mean linear access (almost like in MirrorMove), 1 - skip page and jump 'every other time', 2 - skip 2 pages (256 bytes) ...
Accordingly, Parameter sets the number of additional bands (passes) to fill the entire block. Judging by the execution time of the move, then, for Core2 (probably, and other processors with the old interleaving mode) the 510 hour causes the greatest problems. This means that it is potentially interesting for testing. For other processors and systems, it would be good to check numbers in powers of two minus 2. This '-2' forces you to select not one, but two SDRAM pages, which causes an increase in time. That is, for optimization it would be good to check the row 128-2 = 126, 256-2, 512-2, 1024-2, 2048-2.

Regarding access to 128 bytes, this was done on purpose. As a rule, a data transfer unit on the bus is 64 bytes, which corresponds to a cache line, but in Core2 (and higher) this line is paired and its dimension is 128 bytes. If you read 64 bytes, the download speed will drop. In addition, in the new processors (AMD K10, K11 ...; Intel Core i *), interleaving is not lowercase, but block and 64-byte access unit. So when accessing 128 bytes, both DIMMs are read.
A further increase from 128 to 256 bytes is not yet relevant ... but you can do it. There will be MirrorMove256 Memory Testing with TestMem5 TM5 with custom configs (6)

In TM5 version 0.5, the dimension of the presentation of the test test block has been changed. It used to be in bytes, now in megabytes. The argument is that small blocks are nicely cached in L2 / L3 and won't be tested. Meaning? There is no sense, but convenience suffers, so I changed it.
Because in modern processors the cache is more than 4Mb (or the order of that), then the numbers 0-3 are not interesting and they are interpreted in a special way. Namely, as the degree of window breaking.
Testing is performed in a 1Gb window (this number can be changed) and the test block should fit in it. You can specify the size of the test block in an absolute value Mb, or as part of the window. Here are the numbers 0-3 and define this 'part'.
0 = whole window
1 = 1/2 window
2 = 1/3 window
3 = 1/4 window
Probably, for the MirrorMove * functions it is better to specify 0 and give the whole window.

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Customization.

After starting the program, the MT.cfg file appeared in the bin directory, which is the test configuration file.
Enable = 1 - 1 = enabled, 0 = disabled
Time = 100 - testing time, 100%
Function = SimpleTest -
DLL function name Name = bin \ MT0.dll - dll name
Pattern Mode = 1 - pattern type. 0 = constant, 1 = variable, 2 = random
Pattern Param0 = 0x1E5F - used to generate a pattern; For mode 2 serves as a multiplier
Pattern Param1 = 0x45357354 - similarly. For mode 2 is added to the template.
Parameter = 0 - the principle of moving by addresses.
Test Block Size = 4194304 - block size, in bytes

To generate a template in mode 2, a simple formula is used to obtain RND = Value * Param0 + Param1

Parameter is a way to go to the next block. 0 = linear (sequential) bypass. Other values are only for their DIMM. The number itself is how much to shift.
The idea is that first one DIMM is checked, then the second (and the third, for variants like Core i7).
Access unit, i.e. the number of bytes taken from one DIMM at a time 64 bytes. Accordingly, by setting Parameter = 1, the check will go on each block of the selected DIMM. If "2" - then after one .....
By the way, the section for setting up the equipment is important here. I think almost everyone has memory in paired slots and DUAL mode works. So you need to do one thing - switch the Intreliving mode . 0 for older processors (no integrated memory controller) and 1 for newer ones.
The memory manager in Windows 7 has one feature - as soon as you take memory from Windows, it immediately begins to empty more and more. Usually, it is enough to wait a few cycles and this process will calm down. If it interferes, then you can disable this 'soft' mode of memory request.
If you put: Capable = 0x 0 , then the occupied memory will be immediately latched.

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